JEDEC JES 2

TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION
standard by JEDEC Solid State Technology Association, 07/01/1992

JEDEC JESD218B

SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD
standard by JEDEC Solid State Technology Association, 03/01/2016

JEDEC JESD210

AVALANCHE BREAKDOWN DIODE (ABD) TRANSIENT VOLTAGE SUPPRESSORS
standard by JEDEC Solid State Technology Association, 12/01/2007

JEDEC JESD8-6

ADDENDUM No. 6 to JESD8 – HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/1995

JEDEC JESD8-5A.01

ADDENDUM No. 5 to JESD8 – 2.5 V 0.2 V (NORMAL RANGE), AND 1.8 V TO 2.7 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUIT
standard by JEDEC Solid State Technology Association, 09/01/2007

JEDEC JEP 106AA

STANDARD MANUFACTURERS IDENTIFICATION CODE
standard by JEDEC Solid State Technology Association, 04/01/2009

JEDEC JESD75-1

BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16, 18, AND 20-BIT LOGIC FUNCTIONS USING A 54 BALL PACKAGE
standard by JEDEC Solid State Technology Association, 10/01/2001

JEDEC JESD22-A102D

ACCELERATED MOISTURE RESISTANCE – UNBIASED AUTOCLAVE
standard by JEDEC Solid State Technology Association, 11/01/2010

JEDEC JESD 9-A

METAL PACKAGE SPECIFICATION FOR MICROELECTRONIC PACKAGES AND COVERS
standard by JEDEC Solid State Technology Association, 04/01/1987

JEDEC EIA 397

RECOMMENDED STANDARD FOR THYRISTORS
standard by JEDEC Solid State Technology Association, 06/01/1972