JEDEC JESD76-1

STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (WIDE RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001

JEDEC JESD8-21A

POD135 – 1.35 V PSEUDO OPEN DRAIN I/O
standard by JEDEC Solid State Technology Association, 09/01/2013

JEDEC JESD209-4-1

Addendum No. 1 to JESD209-4 – Low Power Double Data Rate 4 (LPDDR4)
Amendment by JEDEC Solid State Technology Association, 01/01/2017

JEDEC JEP147

PROCEDURE FOR MEASURING INPUT CAPACITANCE USING A VECTOR NETWORK ANALYZER (VNA)
standard by JEDEC Solid State Technology Association, 10/01/2003

JEDEC JEP174

UNDERSTANDING ELECTRICAL OVERSTRESS – EOS
standard by JEDEC Solid State Technology Association, 09/01/2016

JEDEC JESD51-8

INTEGRATED CIRCUIT THERMAL TEST METHOD ENVIRONMENTAL CONDITIONS – JUNCTION-TO-BOARD
standard by JEDEC Solid State Technology Association, 10/01/1999

JEDEC JEP122H

Failure Mechanisms and Models for Semiconductor Devices
standard by JEDEC Solid State Technology Association, 09/01/2016

JEDEC JESD218B.01

SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD
standard by JEDEC Solid State Technology Association, 06/01/2016

JEDEC JESD302 (R2009)

RANGES AND CONDITIONS FOR SPECIFYING BETA FOR LOW POWER, AUDIO FREQUENCY TRANSISTORS FOR ENTERTAINMENT SERVICE
standard by JEDEC Solid State Technology Association, 01/01/1965